/*
 * Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef __DDR_MC_IF_H__
#define __DDR_MC_IF_H__

#include <ddr_mc_regs.h>

#define AN_VERSION              "2.10"

#define MC_INIT_NUM			(507)

#define LP_CMD_OFFSET		(8)

#define DDRMC_R000		DENALI_CTL_00
#define DDRMC_R001		DENALI_CTL_12
#define DDRMC_R002		DENALI_CTL_15
#define DDRMC_R003		DENALI_CTL_16
#define DDRMC_R004		DENALI_CTL_58
#define DDRMC_R005		DENALI_CTL_61
#define DDRMC_R006		DENALI_CTL_62
#define DDRMC_R007		DENALI_CTL_66
#define DDRMC_R008		DENALI_CTL_69
#define DDRMC_R009		DENALI_CTL_75
#define DDRMC_R010		DENALI_CTL_76
#define DDRMC_R011		DENALI_CTL_78
#define DDRMC_R012		DENALI_CTL_79
#define DDRMC_R013		DENALI_CTL_80
#define DDRMC_R014		DENALI_CTL_81
#define DDRMC_R015		DENALI_CTL_86
#define DDRMC_R016		DENALI_CTL_87
#define DDRMC_R017		DENALI_CTL_88
#define DDRMC_R018		DENALI_CTL_89
#define DDRMC_R019		DENALI_CTL_139
#define DDRMC_R020		DENALI_CTL_140
#define DDRMC_R021		DENALI_CTL_152
#define DDRMC_R022		DENALI_CTL_153
#define DDRMC_R023		DENALI_CTL_160
#define DDRMC_R024		DENALI_CTL_161
#define DDRMC_R025		DENALI_CTL_182
#define DDRMC_R026		DENALI_CTL_183
#define DDRMC_R027		DENALI_CTL_467
#define DDRMC_R028		DENALI_CTL_474
#define DDRMC_R029		DENALI_CTL_477
#define DDRMC_R030		DENALI_CTL_479
#define DDRMC_R031		DENALI_CTL_480
#define DDRMC_R032		DENALI_CTL_481
#define DDRMC_R033		DENALI_CTL_482
#define DDRMC_R034		DENALI_CTL_483
#define DDRMC_R035		DENALI_CTL_484
#define DDRMC_R036		DENALI_CTL_485
#define DDRMC_R037		DENALI_CTL_486
#define DDRMC_R038		DENALI_CTL_487
#define DDRMC_R039		DENALI_CTL_489
#define DDRMC_R040		DENALI_CTL_490
#define DDRMC_R041		DENALI_CTL_491
#define DDRMC_R042		DENALI_CTL_492
#define DDRMC_R043		DENALI_CTL_493
#define DDRMC_R044		DENALI_CTL_494

#endif	// __DDR_MC_IF_H__
